11:00 - 11:20

Impact of Two-Step Recessed SiGe S/D Engineering for Advanced pMOSFETs of 32 nm Technology Node and Beyond

N. Kusunoki, N. Yasutake, M. Awano, I. Mizushima, H. Yoshimura, S. Yamada, F. Matsuoka

11:20 - 11:40

Simulation Study of Multiple FIN FinFET Design for 32nm Technology Node and Beyond

X. Wang, A. Bryant, O. Dokumaci, P. Oldiges, W. Haensch

11:40 - 12:00

Device Design and Scalability of an Impact-Ionization MOS Transistor

with an Elevated Impact Ionization Region

E.-H. Toh, G. H. Wang, L. Chan, G. Samudra, Y.-C. Yeo

12:00 - 12:20

A Prototype Wafer Processing TCAD Tool Composed of BMD Simulation Module, Metal Gettering and Thermal Stress/Slip Functions for Scaled Device Design Phase

T. Okada, A. Fathurahman, R. Takeda, H. Banba, H. Kubota, Y. Matsushita, M. Naito, S. Nakamura

12:20 - 12:40

Compact Modeling of Phase-Change Memories

K. Sonoda, A. Sakai, M. Moniwa, K. Ishikawa, O. Tsuchiya, Y. Inoue

12:40 - 13:00

Modeling of NBTI Degradation for SiON pMOSFET

J. Shimokawa, T. Enda, N. Aoki, H. Tanimoto, S. Ito, Y. Toyoshima

11:00 - 11:20

Modeling Study of Ultra-Thin Ge Layers Using Tight-Binding, LCBB and kp Methods

D. Rideau, E. Batail, S. Monfray, C. Tavernier, H. Jaouen

11:20 - 11:40

Analysis of Silicon Dioxide Interface Transition Region in MOS Structures

S. Markov, N. Barin, C. Fiegna, S. Roy, E. Sangiorgi, A. Asenov

11:40 - 12:00

Tunneling Properties of MOS Systems Based on High-k Oxides

F. Sacconi, A. Pecchia, J.M.Jancu, M. Povolotskyi, A. Di Carlo, J.M. Jancu

12:00 - 12:20

First-Principles Investigation on Oxide Trapping

W. Gös, T. Grasser

12:20 - 12:40

A Self-Consistent Simulation of InSb Double-Gate MOSFETs Using Full-Band Tight-Binding Approach

X. Guan, Y. Tan, J. Lu, L. Tian, Y. Wang, Z. Yu

12:40 - 13:00

Influence of Oxygen Composition and Carbon Impurity on Electronic Reliability of HfO2

K. Suzuki, Y. Ito, H. Miura