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Workshop 1


Simulation and Characterization of Statistical CMOS Variability and Reliability
A. Asenov (Glasgow University), S. Nassif (IBM), G. Baccarani (University of Bologna)
Bologna, 9th September 2010
8th September
17.30 Registration and Poster Session
9th September
08.30  Introduction: Impact of statistical variability and reliability on circuit design (S. Nassif, IBM).
09.00 TCAD simulation of statistical variability
09.00  Europe speaker: A. Brown (Glasgow University)
09.25  US speaker: V. Moroz (Synopsys)
09.50  Asia speaker: S. Toriyama (Toshiba)
10.15  Coffee break
10.30  Measurements and characterization of statistical variability
10.30   US speaker: C. Spanos (Univ. of California at Berkeley)  
10.55   Europe speaker: G. Ghibaudo (IMEP/MINATEC)
11.20   Asia speaker: T. Hiramoto (Tokyo University) 
12.00  Buffet lunch + interactive presentations from TCAD vendors
13.30  Reliability impact and scaling trends
13.30   US speaker: K. Cao (University of Arizona)
13.55   Asia speaker: K. Takeuchi (Toshiba)
14.20   Europe speaker: T.Grasser (TU Vienna)
14.45  Coffee break
15.00  Statistical compact model strategies and statistical circuit simulation
15.00  Asia speaker: M. Miura-Mattausch (Hiroshima University)
15.25  US speaker: J. Victory (Sentinel)
15.50  Europe speaker: A. Juge (ST Microelectronics)
16.15 Closing: Interaction between TCAD, compact models and circuit simulation to support statistical and robust design (A. Asenov)
16.45 Close

The Workshop flyer is available here.

The Workshop presentations are available here.