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Victor Moroz

Abstract

Title: Modeling FinFET Variability Mechanisms
 
The dominant variability mechanism for planar MOSFETs - random dopant fluctuations in the channel - is rapidly increasing into prohibitive territory with transistor scaling. This is one of the main forces that is driving a transition to alternative transistor architectures with fully depleted undoped channels. A favorite new architecture candidate is a FinFET that escapes channel random dopant fluctuations by design and therefore has a chance of being manufacturable beyond the 20nm node. Yet, the FinFET inherits a variety of variability mechanisms from planar MOSFETs and adds several new mechanisms on top of it. So far, the impact of line edge roughness on FinFETs has been widely studied and reported to induce unacceptable FinFET variability, which can be overcome by employing spacer lithography. However, other aspects of FinFET variability have not been systematically explored yet. The goal of this work is to bridge this gap and provide guidelines on major FinFET-specific variability mechanisms along with an appropriate modeling methodology. We perform variability analysis of source/drain junction abruptness; in-situ vs implant vs plasma doping of source/drain; etch pattern effects; how line edge roughness manages to make some impact on spacer lithography; mask misalignment; NBTI evolution with FinFET scaling; and CMP-driven FinFET stress and capacitance variations.
 

Bios

Victor Moroz received his Ph.D. in Semiconductor Physics in 1992 from the University of Nizhny Novgorod, Russia. His professional career revolves around semiconductor physics and includes silicon process integration in the industry, teaching undergraduate and graduate students, and for the last 15 years - developing simulation tools and applications at TMA and TCAD Department at Synopsys. Several facets of this activity are reflected in a book and over 100 technical papers, invited presentations, and patents.