Session 7B

Room AndalucĂ­a 3.


Reliability I

10:20 – 10:40

A Physics-based TCAD Framework for NBTI
Ravi Tiwari1, Meng Duan2, Mohit Bajaj3, Denis Dolgos4, Lee Smith5, Hiu Yung Wong6 and Souvik Mahapatra1
1Department of Electrical Engineering, Indian Institute of Technology Bombay (India)
2Synopsys Northern Europe Ltd. (UK)
3Synopsys India Private Limited (India)
4Synopsys Switzerland LLC (Switzerland)
5Synopsys Inc. (USA)
6San Jose State University (USA)

10:40 – 11:00

A Stochastic Simulation Framework for TDDB in MOS Gate Insulator Stacks
Satyam Kumar, Tarun Samadder, Dimple Kochar and Souvik Mahapatra
Department of Electrical Engineering, Indian Institute of Technology Bombay (India)

11:00 – 11:20

CARAT – A Reliability Analysis Framework for BTI-HCD Aging in Circuits
Prasad Gholve1, Payel Chatterjee1, Chaitanya Pasupuleti1, Hussam Amrouch2, Narendra Gangwar1, Shouvik Das1, Uma Sharma1, Victor M van Santen2 and Souvik Mahapatra1
1Department of Electrical Engineering, Indian Institute of Technology Bombay (India)
2Institute of Computer Architecture and Computer Engineering, University of Stuttgart (Germany)

11:20 – 11:40

Trap and Self-Heating Effect Based Reliability Analysis to Reveal Early Aging Effect in Nanosheet FET
Sunil Rathore, Rajeewa Kumar Jaisawal, P. N. Kondekar, and Navjeet Bagga
VLSI Design and Nano-scale Computational Lab, Electronics and Communication Engineering Department, PDPM-IIITDM (India)