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Carrier Transport in Nano-Transistors: Theories and Experiments

Monday, September 8, 2014

This workshop is intended to provide a forum for promoting our understanding of carrier transport in ultimately-scaled transistors and collecting missing piece of the puzzle. The downscaling of CMOS transistors in integrated circuits continues with an introduction of new device structures and new materials. To take advantage of their potentials and find the limits of the miniaturization, a deep understanding of new transport phenomena emerging in nanoscale transistors is indispensable both from the theoretical and experimental viewpoints.

This workshop is planned to consist of theoretical and experimental talk of leading experts in the field for each topic. A list of invited speakers is given below.

Hideaki Tsuchiya (Kobe University, Japan) and Yoshinari Kamakura (Osaka University, Japan)

Invited Speakers:

  • Shin'ichi Takagi (University of Tokyo, Japan)

Experimental Aspects of Carrier Transport Properties in III-V and III-V-OI MOSFETs

  • Tomislav Suligoj (University of Zagreb, Croatia)
Electron Transport in Thin-Body InGaAs-OI MOSFETs: A Theoretical Viewpoint
  • Akira Toriumi (University of Tokyo, Japan)

Carrier Transport in Ge MOSFETs: An Experimental Viewpoint

  • David Esseni (University of Udine, Italy)

Carrier Transport in Nanoscale MOSFETs and Tunnel FETs: Fundamental Aspects and Design Implications

  • Ken Uchida (Keio University, Japan)
  • Experimental Study on Carrier Transport in Ultrathin-Body MOSFETs
    • Toshiro Hiramoto (University of Tokyo, Japan)
    • Carrier Transport in Nanowire MOSFETs: An Experimental Viewpoint
    • Nobuyuki Sano (University of Tsukuba, Japan)
    Role of Coulomb Interaction in Nanoscale MOSFETs: A Theoretical Viewpoint
    • Ming-Jer Chen (National Chiao Tung University, Taiwan)

    Long-Range Coulomb Interactions in Nanoscale MOSFETs: An Experimental Viewpoint


    The Workshop program is available here.