September 2, 2020 How to Proceed Virtual Conference and Time Table are posted.
August 6, 2020 Advanced Program and Speaker Instructions are posted.
July 22, 2020 Registration and Late news submission site is opened.
June 19, 2020 Registration fee is posted. Abstract submission deadline has been extended to June 27, 23:59 PST.
June 9, 2020 About Virtual Conference is posted.
May. 26, 2020 IMPORTANT ANNOUNCEMENT is posted.
Mar. 27, 2020 2nd Call for Papers is posted.
Mar. 26, 2020 Respond to the COVID-19 coronavirus infection is posted.
Mar. 24, 2020 Abstract submission deadline has been extended to May 31, 2020.
Mar. 13, 2020 Information of Workshops is posted.
Mar. 13, 2020 List of invited speakers is posted.
Feb. 24, 2020 List of plenary speakers is posted.
Jan. 31, 2020 The SISPAD abstract submission site is now open.
International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) provides an international forum for the presentation of leading-edge research and development results in the area of process and device simulation. SISPAD is one of the longest-running conferences devoted to technology computer-aided design (TCAD) and advanced modeling of novel semiconductor devices and nano electronic structures.
The 25th SISPAD will be held as an All-Virtual conference.
About Virtual Conference
Given the global health concerns associated with COVID-19, the organization of SISPAD2020 has decided to hold the SISPAD 2020 as ALL-VIRTUAL conference.
The participants can view moving images pre-recorded by presenters on demand for the duration of the conference (two weeks). The presentations will be discussed with text-based message system (moodle).
For more details about how to proceed, please refer this instruction.
Scope and Topics
This conference provides an opportunity for the presentation and discussion of the latest advances in modeling and simulation of semiconductor devices, processes, and equipment for integrated circuits.
Modeling and simulation of all sorts of semiconductor devices, including FinFETs, GAA FETs, ultra-thin SOI devices, emerging memory devices, newmaterial-based nanodevices, optoelectronic devices, TFTs, sensors, power electronic devices, spintronic devices, tunnel FETs, SETs, organic electronic devices, and bioelectronic devices
Modeling and simulation of all sorts of semiconductor processes, including firstprinciples material design and growth simulation of nano-scale fabrication
Fundamental aspects of device modeling and simulation, including quantum transport, thermal transport, fluctuation, noise, and reliability
Compact modeling for circuit simulation, including low-power, high frequency, and power electronics applications
Process/device/circuit co-simulation in context with system design and verification
Equipment, topography, lithography modeling
Interconnect modeling, including noise and parasitic effects
Numerical methods and algorithms, including grid generation, user-interface, and visualization
Metrology for the modeling of semiconductor devices and processes
Multiscale approach from First Principles to TCAD simulations
Estimation with TCAD and machine learning
Neuromorphic devices and quantum computing
Kohei M. Itoh (Keio Univ.)
Forefront of Silicon Quantum Computing
Kohei Itoh graduated from Keio University and received his M. S. and Ph. D. from UC Berkeley. He joined Keio University as a faculty in 1995 and became a full professor in 2007. His main focus of research has been quantum computing, quantum sensing, and quantum physics, which led to more than 330 journal publications. Currently he leads a variety of quantum information projects in Japan as the Research Supervisor of the Japan Science and Technology Agency’s “Quantum state control and functionalization project” and the Program Director of Quantum Information Technology in the MEXT Quantum Leap Flagship Program. He is also a founder of the IBM Quantum Computer Network Hub at Keio University.
Marco Pala (CNRS, Univ. Paris-Sud)
Ab-initio quantum transport with a basis of unit-cell restricted Bloch functions and the NEGF formalism
Marco Pala received the physics degree and the PhD in electronical engineering from the University of Pisa, Italy in 2000 and 2004, respectively. From 2004 to 2005 he was post-doc at CEA-LETI, Grenoble, France. He entered at CNRS as research scientist in 11/2005 at IMEP-LAHC, Grenoble. From 2016 he is with the Centre for Nanoscience and Nanotechnology (C2N), Palaiseau, France, where is the leader of the computational electronics group. His main research interests concern the electronic and transport properties of nanoscale devices. Recently, he worked on quantum transport calculations based on ab-initio methods to assess the use of new materials in nanoelectronics. He is co-author of 66 papers in peer-reviewed journals and 43 proceedings in international conferences.
Terry Ma (Synopsys)
Future of Power Electronics from TCAD Perspective
Terry Ma is Vice President of Engineering at Synopsys, Inc., and he is in charge of TCAD Business Unit that supplies Technology CAD software products and solutions for process and device technology exploration and development, as well as Design-Technology Co-Optimization. Terry received his Bachelor of Science degree in Chemical Engineering from University of California, Berkeley, and graduated with a MBA degree from the Kellogg School of Management at Northwestern University.
Atsushi Oshiyama (Nagoya Univ.)
Computics Approach toward Clarification of Atomic Reactions during Epitaxial Growth of GaN
Masaharu Kobayashi (Univ. Tokyo)
On the Physical Mechanism of Negative Capacitance Effect in Ferroelectric FET
Naoyuki Shigyo (Tokyo Inst. Tech.)
Modeling and Simulation of Si IGBTs
Fahd Ayyalil Mohiyaddin (imec)
TCAD-Assisted MultiPhysics Modeling & Simulation for Accelerating Silicon Quantum Dot Qubit Design
Daniel Chanemougame (TEL at Albany)
Agile Pathfinding Technology Prototyping: the Hunt for Directional Correctness
Makoto Takamiya (Univ. Tokyo)
Power Device Degradation Estimation by Machine Learning of Gate Waveforms
The presentations planned for the workshops are included in the special session program in SISPAD2020 virtual conference.
Combination of TCAD and Machine Learning
Organizer: Satofumi Souma (Kobe Univ.), Co-organizer: Yusuke Noda (Kanazawa Gakuin Univ.)
Multiscale Approach from Atoms to Device: Toward Predictive Simulation
Organizer: Hideki Minari (Sony Semiconductor Solutions), Co-organizer: Junichi Hattori (AIST)
Final Paper Submission
Deadline for submission of final paper : August 21, 2020, 23:59 p.m. (JST)
The final paper submission site is here.
Manuscripts sent by e-mail or postal mail will NOT be considered. Please read carefully the following instructions to prepare the final paper and the copyright transfer form.
Final paper must be an IEEE Xplore compatible PDF file. The size of the file must be no larger than 5MB. The final paper must be four pages including tables and figures. If your paper is less than four pages, please add blank page(s). The paper size must be A4 (210 mm x 297 mm).
The procedure to create an IEEE Xplore compatible PDF file is as follows.
1. Create IEEE PDF eXpress Plus Account
- Visit IEEE PDF eXpress Plus.
- Click "New User - Click Here" to create your account. Conference ID : 49475X
2. Download Template
- Click "Article Template" and download the template "A4." The template is also available from here.
3. Check or Convert Files
- Click "Create New Title", enter title info, and submit files for checking or converting. The result will be sent by e-mail you specified.
Please do not forget to submit the checked PDF file through the submission site.
Copyright transfer form must be submitted in PDF format. The template files are available from the following links.
Conference registration has been closed.
Please complete the online registration from here. After we confirm your registration, your account will be issued to access the VIRTUAL conference. As it takes some time to issue your account, please complete your registration as soon as possible, if you plan to participate in SISPAD2020. The registration fee are as follows:
Since SISPAD 2020 is All-Virtual conference, we plan to have the authors make a video of the presentation in mp4 format. The deadline for video submission is September 7, 23:59 (JST). Presentation videos can be viewed by the conference participants only during the conference period. The video cannot be downloaded.
N. Mori (Osaka Univ.)
Y. Kamakura (Osaka Inst. Technol.)
T. Kunikiyo (Renesas)
S. Souma (Kobe Univ.)
J. Hattori (AIST)
S. Sato (Kansai Univ.)
S. Souma (Kobe Univ.)
K. Matsuzawa (Kioxia)
T. Iizuka (Hiroshima Univ.)
H. Minari (Sony Semiconductor Solutions)
N. Nakano (Keio Univ.)
K. Sonoda (Renesas)
International Steering Committee:
D. Esseni (Univ. of Udine, Italy)
F. Gamiz (Univ. of Granada, Spain)
N. Goldsman (Univ. of Maryland, USA)
Y. Kamakura (Osaka Inst. Technol., Japan)
J. Lorenz (Fraunhofer IISB, Germany)
N. Mori (Osaka Univ., Japan)
L. F. Register (Univ. of Texas at Austin, USA)
K. Sonoda (Renesas, Japan)
W. Vandenberghe (Univ. of Texas at Dallas, USA)
T. Kunikiyo (Renesas)
S. Souma (Kobe Univ.)
M. Bazizi (Applied Materials)
L. Filipovic (TU Wien)
A. Godoy (Univ. of Granada)
J. Hattori (AIST)
A. Hiroki (Kyoto Inst. Technol.)
S.-M. Hong (Gwangju Inst. Sci. and Technol.)
C. Jungemann (Univ. of Aachen)
C. Kaneta (Fujitsu Laboratories)
M. Karner (Global TCAD Solutions)
K. Kukita (Kioxia)
U. Kwon (Samsung)
Y. Li (National Chiao Tung Univ.)
B. M.-Kope (TSMC)
S. Martinie (CEA-LETI)
H. Minari (Sony)
V. Moroz (Synopsys)
S. Reggiani (Univ. of Bologna)
F. Register (Univ. of Texas at Austin)
H. Tanaka (Kyoto Univ.)
W. Vandenberghe (Univ. of Texas at Dallas)
H. Y. Wong (San Jose State Univ.)
J. Wu (TSMC)