Technical Program:
September 6, 2006
September 8, 2006
Session 5 - Fluctuations | |
8:30 - 9:15 I-5 |
Invited Speaker "Numerical Simulation of RF Noise in Si Devices" Christoph Jungemann, Bernd Meinerzhagen*, Bundeswehr University, Neubiberg, Germany, * TU Braunschweig, Braunschweig, Germany |
| 9:15 - 9:40 5-1 |
"Physics-Based Phase Noise Analysis of CMOS RF Oscillators" S-M. Hong, C.H. Park*, M.J. Lee, H.S. Min, Y-J. Park, Seoul National University, Seoul, Korea, *Kwangwoon University, Seoul, Korea |
| 9:40 - 10:05 5-2 |
"Numerical Investigation of Low Frequency Noise in MOSFETs with High-k Gate Stacks" Y. Liu, S. Cao, R. W. Dutton, Stanford University, Stanford, CA |
| Break (15 minutes) | |
| 10:20 - 10:45 5-3 |
"Investigation of SNM with Random Dopant Fluctuations
for FD SGSOI and FinFET 6T SOI SRAM Cell by Three-
Dimensional Device Simulation" R. Tanabe, Y. Ashizawa, H. Oka, Fujitsu Laboratories Ltd., Akiruno, Tokyo, Japan |
| 10:45 - 11:10 5-4 |
"Device Characteristics with Potential Fluctuation Induced
by Nonuniformity at Gate Oxide Interface with
Multifractal Analysis" Y. Ashizawa, R. Tanabe, H. Oka, Fujitsu Laboratories Ltd., Akiruno, Tokyo, Japan |
| 11:10 - 11:35 5-5 |
"Device Simulation of Random Dopant Effects in Ultra-
small MOSFETs Based on Advanced Physical Models" S. Toriyama, D. Hagishima, K. Matsuzawa, N. Sano*, Toshiba Corporation, Yokohama, Kanagawa, Japan, *University of Tsukuba, Tsukuba, Japan |
| 11:35 - 12:00 5-6 |
"Modeling of Discrete Dopant Effects on Threshold Voltage
Shift by Random Telegraph Signal" K. Sonoda, K. Ishikawa, T. Eimori, O. Tsuchiya, Renesas Technology Corporation, Itami, Hyogo, Japan |
Session 6 - Applications: Devices |
|
| 9:15 - 9:40 6-1 |
"Stress Sensitivity of PMOSFET under High Mechanical
Stress" D. Tekleab, V. Adams, K. Loiko, B. Winstead, S. Parsons, P. Grudowski, M. Foisy, Freescale Semiconductor, Austin, TX |
| 9:40 - 10:05 6-2 |
"Multi-Layer Model for Stressor Film Deposition" K. V. Loiko, V. Adams, D. Tekleab, B. Winstead, X.-Z. Bo, P. Grudowski, S. Goktepeli, S. Filipiak, B. Goolsby, V. Kolagunta, M. C. Foisy, Freescale Semiconductor, Austin, TX. |
| Break (15 minutes) | |
| 10:20 - 10:45 6-3 |
"Simulation NOR-Flash Memory Cells Focusing on
Narrow Channel Effects on VTH Dispersion" M. Kondo, T. Nakauchi, S. Ito, N. Aoki, M. Nakamura, K. Naruke, H. Ishiuchi, Toshiba Corporation, Yokohama, Kanagawa, Japan |
| 10:45 - 11:10 6-4 |
"Improvement of Drive Current in Bulk-FinFET using
Full 3D Process/Device Simulations" T. Kanemura, T. Izumida, N. Aoki, M. Kondo, S. Ito, T. Enda, K. Okano, H. Kawasaki, A. Yagishita, A. Kaneko, S. Inaba, M. Nakamura, K. Ishimaru, K. Suguro, K. Eguchi, H. Ishiuchi, Toshiba Corporation, Yokohama, Japan |
| 11:10 - 11:35 6-5 |
"Small-Signal Analysis and Modeling of Asymmetric
Source/Drain Parasitic Resistances for DRAM Access
Transistors in Low-Power Applications" Y.P. Kim, M. Ulrich, P. Vaidyanathan, V. Ananthan, C. Mouli, K. Parekh, Micron Technology Inc., Boise, ID |
| 11:35 - 12:00 6-6 |
"Interface Barrier Abruptness and Work Function
Requirements for Scaling Shottky Source-Drain MOS Transistors" N. Agrawal, J. Chen, Z. Hui, Y-C. Yeo, S. Lee, D. S. H. Chan, M-F. Li*, G. S. Samudra, National University of Singapore, Singapore, *Institute of Microelectronics, Singapore |
Session 7 - Process Physics: Point Defects and Interfaces |
|
1:30 - 1:55 7-1 |
"Ab Initio Study of Boron Pile-up at the Si(001)/SiO2 Interface" J. Zhang, Y. Ashizawa*, H. Oka*, C. Kaneta*, T. Yamazaki*, Fujitsu R&D Center Co. Ltd., Beijing, P.R. China, *Fujitsu Laboratories LTD, Akiruno, Japan |
| 1:55 - 2:20 7-2 |
"Vacancy at Si-SiO2 Interface: Ab-Initio Study" T.A. Kirichenko, D. Yu*, G.S. Hwang*, S. K. Banerjee*, Freescale Semiconductor, Austin, TX, *University of Texas, Austin, TX |
| 2:20 - 2:45 7-3 |
"Quantum Chemical Molecular Dynamics Analysis of the
Effect of Oxygen Vacancies and Strain on Dielectric Characteristic of HfO2-x Films" Y. Ito, K. Suzuki, H. Miura, Tohoku University, Sendai, Japan |
Session 8 - Compact Models |
|
1:30 - 1:55 8-1 |
"Global Identification of Variability Factors and Its Application to the Statistical Worst-Case Model Generation" K. Eikyu, T. Okagaki, M. Tanizawa, K. Ishikawa, T. Eimori, O. Tsuchiya, Renesas Technology Corporation, Itami, Hyogo, Japan |
| 1:55 - 2:20 8-2 |
"Analysis and Compact Modeling of MOSFET High-
Frequency Noise" T. Warabino, M. Miyake, N. Sadachika, D. Navarro, Y. Takeda, G. Suzuki, T. Ezaki, M. Miura-Mattausch, H.J. Mattausch, T. Ohguro*, T. Iizuka*, M. Taguchi*, S. Kumashiro*, S. Miyamoto*, Hiroshima University, Hiroshima, Japan, *Semiconductor Technology Academic Research Center, Shin-Yokohama, Japan |
| 2:20 - 2:45 8-3 |
"A Compact Model for Phase Change Memories" P. Fantini, A. Benvenuti, A. Pirovano, F. Pellizzer, D. Ventrice*, G. Ferrari*, STMicroeletronics, Agrate Brianza, Italy, *Politecnico di Milano, Milan, Italy |
| 2:45 - 3:10 8-4 |
"A Circuit-Compatible SPICE Model for Enhancement
Mode Carbon Nanotube Field Effect Transistors" J. Deng, H-S.P. Wong, Stanford University, Stanford, CA |
| 3:30 - 5:30 | Poster Session |