. .

Tuesday, 25 September 2007

Poster Session

P1 Calibrated Hydrodynamic Simulation of Deeply-Scaled Well-Tempered Nanowire Field Effect Transistors
O. M. Nayfeh, D. A. Antoniadis
P2 The Effect of Optical Phonon Scattering on the On-Current and Gate Delay Time of CNTFETs
M. Pourfath, H. Kosina
P3 Monte Carlo Modeling of Schottky Contacts on Semiconducting Carbon Nanotubes
H.-N. Nguyen, H. Cazin d'Honincthun, C. Chapus, A. Bournel, S. Galdin-Retailleau, P. Dollfus, N. Locatelli
P4 Box Method for the Convection-Diffusion Equation Based on Exponential Shape Functions
H. Kosina, O. Triebl, T. Grasser
P5 A Simplified Quantum Mechanical Model for the Electron Distribution in a Si Nanowire
W. Magnus, B. Soree, G. Pourtois, S. Compernolle
P6 Efficient Green's Function Algorithms for Atomistic Modeling of Si-Nanowire FETs
A. Pecchia, G. Penazzi, A. Di Carlo
P7 Influence of Uniaxial [110] Stress on the Silicon Conduction Band Structure:
Stress Dependence of the Nonparabolicity Parameter
V. A. Sverdlov, G. Karlowatz, E. Ungersboeck, H. Kosina
P8 Maxwell Equations on Unstructured Grids Using Finite-Integration Methods
W.J. Schoenmaker, P. Meuris, E. Janssens, K.-J. van der Kolk, N. van der Meijs, W.H.A. Schilders
P9 Adaptive Time Discretization for a Transient Quantum Drift-Diffusion Model
T. Shimada, S. Odanaka
P10 MDS - A New Highly Extensible Device Simulator
T. D. Linton Jr., K. Foley, F. Heinz, R. Kotlyar, P. Matagne, A. Eremenko, S. Sergienko, M. Stettler, M. D. Giles, B. Voinov
P11 Influence of the Poole-Frenkel Effect on Programming and Erasing in Charge Trapping Memories
Y. Song, G. Du, J. Yang, R. Jin, R. Han, K.-H. Lee, X. Liu
P12 On the Magnetic Field Extraction for On-Chip Inductance Calculation
A. Nentchev, S. Selberherr
P13 EMC Simulation of THz Emission from Semiconductor Devices
V. M. Polyakov, F. Schwierz
P14 Enhanced Band-to-Band Tunneling-Induced-Hot-Electron Injection in P-Channel Flash by
SiGe Channel and HfO2 Tunnel Dielectric
C.-C. Wang, K.-S. Chang-Liao, C.-Y. Lu, T.-K. Wang
P15 Challenges in 3D Process Simulation for Advanced Technology Understanding
S. M. Cea, A. Eremenko, P. Fleischmann, M. D. Giles, S. Halama, F. O. Heinz, A. N. Ivanov, P. H. Keys, A. D. Lilak
P16 Characteristic Fluctuation Dependence on Discrete Dopant for 16nm SOI FinFETs at Different Temperature
Y. Li, C.-H. Hwang, S.-M. Yu, H.-M. Huang, T.-C. Yeh, H.-W. Cheng, H.-M. Chen, J.-R. Hwang, F.-L. Yang
P17 Hot-Carrier Behaviour of a 0.35nm High-Voltage n-Channel LDMOS Transistor
J.-M. Park, H. Enichlmair, R. Minixhofer
P18 Dynamic Monte Carlo Simulation of an Amorphous Organic Device
G. Meller, L. Li, S. Holzer, H. Kosina
P19 Charge Injection Model in Organic Light-Emitting Diodes Based on a Master Equation
L. Li, G. Meller, H. Kosina
P20 Simulation of Analog/RF Performance and Process Variation in Nanowire Transistors
R. Wang, J. Zhuge, R. Huang
P21 Analysis of Process-Geometry Modulations in a 65 nm Technology Through 3D TCAD
L. Sponton, L. Bomholt, W. Fichtner
P22 Asymmetrical Triple-Gate FET
M.-H. Chiang, J.-N. Lin, K. Kim, C.-T. Chuang
P23 Process Variation-Aware Estimation of Static Leakage Power in Nano CMOS
B. P. Harish, N. Bhat, M. B. Patil
P24 The Optimization of Low Power Operation SRAM Circuit for 32nm Node
R. Tanabe, H. Anzai, Y. Ashizawa, H. Oka
P25 Device Design Evaluation of Multigate FETs Using Full 3D Process and Device TCAD Simulation
M. Nawaz, S. Decker, L.-F. Giles, W. Molzer, T. Schulz, K. Schrüfer, R. Mahnkopf
P26 Modeling and Extraction of Effective Lateral Doping Profile Using the
Relation of On-Resistance vs. Overlap Capacitance in (100) and (110)-Oriented MOSFETs
S.-D. Kim, B. Yang, S. Narasimha, A. Waite, K. Nummy, L. Black, H. Yin, H. J. Gossmann, S. Luning
P27 Molecular Orbital Examination of Negative-Bias Temperature Instability Mechanism
T. Maruizumi, J. Ushio, Y. Shiraki
P28 Process Margin Anaylsis and Yield Enhancement Through Statistical Topography Simulation
K.-B. Chang, W.-Y. Chung, S.-J. Kim, Y.-M. Ko, J.-J. Jang, T.-K. Kim, J.-K. Park, Y.-K. Park, M.-H. Yoo
P29 Efficient Coupling of Monte Carlo and Level Set Methods for Topography Simulation
O. Ertl, C. Heitzinger, S. Selberherr
P30 Strained Contact Etch Stop Layer Integration: Geometry Design Impact
C. Populaire, D. Villanueva, S. Orain, H. Brillet-Rouxel
P31 Modeling of Deposition During C5F8/CO/O2/Ar Plasma Etching Using Topography and Composition Simulation
T. Ichikawa, T. Takase, N. Tamaoki
P32 Ab Initio Calculations of the Transport Through Single Molecules and Carbon Nanotubes
K. Hirose, N. Kobayashi, H. Ishii
P33 Three-Dimensional Sacrificial Etching
J. Cervenka, H. Ceric, O. Ertl, S. Selberherr
P34 Atomistic Study of Metal/High-K Interface
P.-Y. Prodhomme, P. Blaise, F. Fontaine-Vive, J. Even, M. Orlowski
P35 Ab-Initio Calculations of Indium Migration in Uniaxial Strained Silicon
Y.-K. Kim
P36 Noise Simulation of Nanoscale Devices Based on the Non-Equilibrium Green's Function Formalism
H.-H. Park, S.-M. Hong, S. Jin, H. S. Min, Y. J. Park
P37 RDF Analysis of Small-Signal Equivalent Circuit Parameters in MOSFET Devices
L. Oniciuc, P. Andrei