SISPAD 2011 Companion Work Shop

Companion workshops will be held at the same venue as SISPAD2011 on September 7, 2011. The registration desk will be open from 9:30am at East Pavilion 1F of Hotel Hankyu Expo Park.

Workshop1

“Compact model and its emerging technology linking new device technology and advanced circuit design”

September 7, 2011
Room Izumi
Hotel Hankyu Expo Park, Osaka, Japan

Organizer: Sadayuki Yoshitomi, Toshiba Corporation

10:30  Intdocuction

Sadayuki Yoshitomi (Toshiba Corporation)

10:40  COMON - The European Compact Modeling Network and Verilog-A Compact Model Standardization

D.Tomaszewski^f, J.-M.Sallese^b, N.Chevillon^b, A.Yesayan^b*, J.Alvarado^c*,D.Flandre^c, U.Monga^d*, T.Fjeldly^d, A.Bazigos^b*, M.Bucher^e,T.Sadi^g*, F.Schwierz^g, G.Depeyrotⁱ, M.Yakupov^f*, R.Ritzenhaler^a*, W.Grabinski^h, B.Iñiguez^a (^aUniversitat Rovira i Virgili, Spain, ^bEcole Polytechnique Federale de Lausanne, Suisse, ^cUniversite Catholique de Louvain, Belgium, ^dUniversitetsstudiene pa Kjeller, Norway, ^eTechnical University of Crete, Greece, ^fInstitute of Electron Technology, Poland, ^gTechnische Universitaet Ilmenau, Germany, ^hGMC, Suisse, ^hDolphin Integration, France, ^*seconded / recruited researchers)

Abstract: The talk will present the COMON (Compact Modeling Network), European FP7 Marie-Curie project. The network addresses development of complete compact models of Multi-Gate MOSFETs, HV MOSFETs and III-V FETs. The main topics are SPICE/compact modelling methodologies, model characterization and implementation techniques, model validation via test circuit design and evaluation, and finally dissemination activities. The model implementation topic is strongly related to recent compact model standardization initiative.

To accomplish these tasks COMON network coordinates joint efforts of groups representing 15 European universities and companies in an attempt to transfer the scientific and technological knowledge from academia to industry (especially by means of researcher exchange program), to provide powerful modelling and CAD methodologies for European integrated circuit design centers, and to integrate European research in fragmented R&D areas for the benefit of both young and experienced researchers. Furthermore, the MOS-AK/GSA community provides a Verilog-A standardization platform for compact modeling as well as the international dissemination support.

11:30-13:00         Lunch

13:00  Connecting Compact Models and TCAD: New Techniques in Parameter Extraction and Inverse Modeling
Shen Chen (Cogenda Pte Ltd.)
Abstract: Some new technologies that bridge the gap between TCAD simulation and compact modeling will be discussed. Three topics will be covered in the talk;
1. Using automatic-differentiation and PDE-constrained optimization for parameter extraction.
2. Using PDE-constrained optimization for inverse modeling of MOSFET.
3. Simulating circuits with >20 transistors with TCAD device simulator.

13:50  Oxide Defects: From Microscopic Physics to Compact Models
Tibor Grasser (TU Wien)
Abstract: Oxide defects are responsible for a wide range of important phenomena in MOS transistors, starting from random telegraph noise, 1/f noise, and the bias temperature instability.  Their most peculiar feature is the wide distribution of time constants, which covers the whole experimentally accessible range from the microseconds regime up to weeks and even longer. This workshop presentation starts with a review of the fundamental physics of charge trapping and finishes with preliminary results on how these processes can be captured in a more compact-modeling-like approach.

14:40-15:00  Coffee Break

15:00  Measurement and Characterization of Millimeter-wave Passive and Active Devices

Kenichi Okada (Tokyo Institute of Technology)

Abstract: This presentation will review high-frequency measurement and characterization of CMOS passive and active devices for designing millimeter-wave circuits.

De-embedding and test structure will be also presented.

15:50  Close

Workshop2

 “Prospects of Power Electronics and Power Devices”

September 7, 2011
Room Ginga
Hotel Hankyu Expo Park, Osaka, Japan

Organizer: Ichiro Omura, Kyusyu Institute of Technology

Power electronics and power semiconductor devices have been recognized as the key technology for the future reduction in CO₂ emission. In the future, power electronics systems will be "ubiquitously" used in variety of application including EV, heat pumps, lightings, grid systems, renewable energy systems, ICTs and motor drives. This workshop introduces major power devices used in power electronics systems, including Power MOSFETs, Power ICs and IGBTs, and their application impacts toward low carbon society. It also covers details of power device development trends, and the state-of-the-art performances reported in recent papers.

10:30  Introduction: Future Role of Power Electronics and Power Devices toward Low Carbon Society
Ichiro Omura (Kyushu Institute of Technology)

11:00  Status and Examples of Power Device Simulation: Past Present and Future
Masahiro Tanaka (Kyushu Institute of Technology)

11:30-13:00  Lunch

13:00  Present Status and Future prospects of Low Voltage Power Device and Power ICs and Their Applications
Satoshi Matsumoto (Kyushu Institute of Technology)

13:40  Power Semiconductor Devices for High Power Applications
Ichiro Omura (Kyushu Institute of Technology)

14:10  Surface-Potential-Based Power Device Modeling for Circuit Simulation and Its Applications
Masataka Miyake (Hiroshima University)

14:50-15:10 Coffee Break

15:10  Characterization of high voltage power device to extract model parameters for designing, simulating and evaluating power conversion system
Tsuyoshi Funaki (Osaka University)

15:50  Designing DB (Dielectric Barrier) IGBT Structure with TCAD
Takei Manabu (Fuji electric corp.)

16:30  Close