“Impact of METROLOGY on TCAD”

September 8, 2008
Yumoto Fujiya Hotel, Hakone, JAPAN

Organizers: Takahisa Eimori
Semiconductor Leading Edge Technologies(Selete)
This workshop is targeted to appropriate measurements that are inevitable to guarantee validity of TCAD and develop advance models. Impact of metrology on TCAD is one of key issues for modeling of aggressively scaled-down semiconductor devices. This workshop is intended to provide overview and discussion concerning metrology by invited speakers who are leading
experts in the field.

10:30  T. Eimori(Selete)-- Opening(PDF; 462KB)
10:40  N. Ikarashi(NEC)-- Electron holography characterization of shallow junctions for 45-nm
　　　　node and beyond
11:25  Y. Shimizu(Keio Univ.)-- CMOS Process Monitoring Using Silicon Isotopes(PDF; 968KB)
12:10~13:00  Lunch
13:00  H. Aono(Renesas Tech.)-- A study of NBTI for SRAM Load pMOS by On-The-Fly
　　　　measurements.
13:45  A. Teramoto(Tohoku Univ.)-- Statistical evaluation of RTS by newly developed array(PDF; 2482KB)
　　　　TEG
14:30  K. Ouchi(Toshiba)-- Accurately measured specific contact resistivity for 22-nm-node silicides(PDF; 511KB)
15:15  K. Tatsumura(Toshiba)-- Additional Mobility Components associated with Metal
　　　　Gate/High-k Dielectric Stacks in scaled MOSFETs down to sub-1.0nm EOT
16:00  T. Tanaka(Fujitsu)-- Layout variation analysis of MOSFETs:Compact modeling and its(PDF; 1745KB)
　　　　application to circuit simulation
16:45  S.N. Takeda(NAIST)-- Measurement of Si Subband Dispersion by ARPES: Towards
　　　　Experimental Determination of the Effective Mass in Strained-Si.