Technical Program:
Wednesday, September 6, 2000
Thursday, September 7, 2000, Poster Session

Friday, September 8

Session 6 - Modeling of Sub-100nm Devices

8:40 - 9:05

"Modeling Line Edge Roughness Effects in sub 100 nanometer Gate Length Devices"
P. Oldiges, Q. Lin*, K. Petrillo*, M. Sanchez**, M. Ieong, and M. Hargrove,
IBM SRDC, Hopewell Junction, NY, *IBM T.J. Watson Research Center, Yorktown Heights, NY and **IBM Almaden Research Center, San Jose, CA
9:05 - 9:30
"Effect of Oxide Interface Roughness on Threshold Voltage Fluctuations in Decanano MOSFETs with Ultrathin Gate Oxides"
A. Asenov, and S. Kaya,
University of Glasgow
9:30 - 9:55
"A Novel Simulation Method for Oxynitridation and its Re-oxidation"
N. Kusunoki, T. Shimizu, H. Hazama, and N. Aoki,
Toshiba Corporation, Yokohama, Japan
Break (15 minutes)

10:10 - 10:35
"Circuit-Device Codesign for High Performance Mixed-Signal Technologies"
S. Saxena, P.D. McNamara*, A. Shibkov*, V. Axelrad**, and C. Guardiani*,
PDF Solutions Inc., Richardson, TX, *PDF Solutions Inc., San Jose, CA and **Sequoia Design Systems Inc., Woodside, CA
10:35 - 11:00
"DC and AC Performance Analysis of 25 nm Symmetric/Asymmetric Double-Gate, Back-Gate and Bulk CMOS"
M. Ieong, H-S P. Wong*, Y. Taur*, P. Oldiges, and D. Frank*,
IBM SRDC, Hopewell Junction, NY, *IBM T.J. Watson Research Center, Yorktown Heights, NY
11:00 - 11:25
"Two-Dimensional Bandgap Engineering in a Novel Si/SiGe pMOSFETS with Enhanced Device Performance and Scalability"
Q. Ouyang, X.D. Chen, S. Mudanai, D.L. Kencke, X. Wang, A.F. Tasch, and S.K. Banerjee,
University of Texas at Austin, Austin, TX
11:25 - 11:50
"Improved Device Technology Evaluation and Optimization"
D. Connelly, and M. Foisy,
Motorola Digital DNA Labs, Austin, TX

Session 7 - Process Modeling

8:30 - 9:05

Invited Speaker
"Unusual Effects of Arsenic on the Evolution of Defects in Ion Implanted Silicon"
Kevin Jones, University of Florida
9:05 - 9:30
"Modeling Boron Activation and Diffusion in the Presence of {113}-Defects and Boron-Interstitial Complexes"
D. Stiebel, P. Pichler, N.E.B. Cowern*, and H. Ryssel**,
Fraunhofer Institut für Integrierte Schaltungen, *Philips Research Laboratories, Eindhoven, The Netherlands and **Universität Erlangen-Nürnberg, Erlangen, Germany
9:30 - 9:55
"Effects of Nitrogen on the Activation/Deactivation of Boron and Indium in N-channel CMOS Devices"
S. Aronowitz, H. Puchner, and V. Zubkov,
LSI Logic Corporation, Santa Clara, CA
Break (15 minutes)

10:10 - 10:35
"Kinetics of Boron Activation"
A. Mokhberi, P.B. Griffin, and J.D. Plummer,
Stanford University, Stanford, CA
10:35 - 11:00
"Modeling of Boron Deactivation/Activation Kinetics during Ion implant Annealing"
S. Chakravarthi, S.T. Dunham*,
Boston University, Boston, MA and University of Washington
11:00 - 11:25
"Modeling of Initial Stages of Annealing for Amorphizing Arsenic Implants"
P. Fastenko, and S.T. Dunham*,
Boston University, Boston, MA and *University of Washington, Seattle, WA
11:25 - 11:50
"Appropriate Initial Damage Conditions for "Three-Stream" Point Defect Diffusion Models"
I. Bork, and W. Molzer,
Infineon Technologies AG, Munich, Germany

Session 8 - Devices: Quantum Models

1:30 - 2:05

Invited Speaker
"Characteristics of Silicon Nano-scale Devices"
Toshiro Hiramoto, University of Tokyo
2:05 - 2:30
"Two-qbit Gates Based on Coupled Quantum Wires"
S. Reggiani, A. Bertoni*, P. Bordone*, R. Brunetti*, C. Jacoboni*, M. Rudan, and G. Baccarani,
University of Bologna, Bologna, Italy and *University of Modena and Reggio Emilia, Modena, Italy
2:30 -2:55
"Well-Tempered MOSFETs: 1D Versus 2D Quantum Analysis"
A. Abramo, L. Selmi, Z. Yu*, and R.W. Dutton*,
DIEGM - University of Udine, Udine, Italy and *Stanford University, Stanford, CA
Break (15 minutes)

3:10 - 3:35
"Quantum-Mechanical 2D Simulation of Surface- and Buried-Channel p-MOS"
A.S. Spinelli, A. Benvenuti*, L. Conserva**, A.L. Lacaita**, and A. Pacelli***,
Universita degli Studi dell'Insubria, Como, Italy, *STMicroelectronics, Agrate Brianza, Italy, **DEI, Politecnico di Milano, Milano Italy and ***State University of New York, Stony Brook, NY
3:35 - 4:00
"Nonlinear Discretization Scheme for the Density-Gradient Equations"
M.G. Ancona and B.A. Biegel*,
Naval Research Laboratory, Washington, DC and *NASA Ames Research Center, Moffet Field, CA
4:00 - 4:25
"Modeling of Direct Tunneling Current through Gate Dielectric Stacks"
S. Mudanai, Y-Y Fan, Q. Ouyang, A.F. Tasch, F. Register, D.L. Kwong and S.K. Banerjee,
University of Texas at Austin, Austin, TX
4:25 - 4:50
"Nuclear Modeling of Quantum Gate Leakage Currents with Sensitivity Analysis"
W. Schoenmaker, and W. Magnus,
IMEC, Leuven, Belgium